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http://dx.doi.org/10.18419/opus-8200
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DC Element | Wert | Sprache |
---|---|---|
dc.contributor.author | Wang, Zhigong | de |
dc.contributor.author | Berroth, Manfred | de |
dc.contributor.author | Nowotny, Ulrich | de |
dc.contributor.author | Hofmann, Peter | de |
dc.contributor.author | Hülsmann, Axel | de |
dc.contributor.author | Köhler, Klaus | de |
dc.contributor.author | Raynor, Brian | de |
dc.contributor.author | Schneider, Joachim | de |
dc.date.accessioned | 2014-05-12 | de |
dc.date.accessioned | 2016-03-31T11:45:29Z | - |
dc.date.available | 2014-05-12 | de |
dc.date.available | 2016-03-31T11:45:29Z | - |
dc.date.issued | 1994 | de |
dc.identifier.other | 406379777 | de |
dc.identifier.uri | http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92662 | de |
dc.identifier.uri | http://elib.uni-stuttgart.de/handle/11682/8217 | - |
dc.identifier.uri | http://dx.doi.org/10.18419/opus-8200 | - |
dc.description.abstract | A monolithically integrated clock recovery (CR) circuit making use of the phase-locked loop (PLL) circuit technique and enhancement/depletion AlGaAs/GaAs quantum well-high electron mobility transistors (QW-HEMT's) with gate lengths of 0.3 μm has been realized. A novel preprocessing circuit was used. In the PLL a fully-balanced varactorless VCO was applied. The VCO has a center oscillating frequency of about 7.7 GHz and a tuning range greater than 500 MHz. A satisfactory clock signal has been obtained at a bit rate of about 7.5 Gb/s. The power consumption is less than 200 mW at a supply voltage of -5 V. | en |
dc.language.iso | en | de |
dc.rights | info:eu-repo/semantics/openAccess | de |
dc.subject.classification | Taktrückgewinnung , HEMT , Phasenregelkreis | de |
dc.subject.ddc | 621.3 | de |
dc.title | 7.5 Gb/s monolithically integrated clock recovery circuit using PLL and 0.3-μm gate length quantum well HEMT's | en |
dc.type | article | de |
ubs.fakultaet | Fakultätsübergreifend / Sonstige Einrichtung | de |
ubs.institut | Sonstige Einrichtung | de |
ubs.opusid | 9266 | de |
ubs.publikation.source | IEEE journal of solid-state circuits 29 (1994), S. 995-997. URL http://dx.doi.org./ 10.1109/4.297711 | de |
ubs.publikation.typ | Zeitschriftenartikel | de |
Enthalten in den Sammlungen: | 15 Fakultätsübergreifend / Sonstige Einrichtung |
Dateien zu dieser Ressource:
Datei | Beschreibung | Größe | Format | |
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ber22.pdf | 213,97 kB | Adobe PDF | Öffnen/Anzeigen |
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