05 Fakultät Informatik, Elektrotechnik und Informationstechnik

Permanent URI for this collectionhttps://elib.uni-stuttgart.de/handle/11682/6

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Institute: search.filters.UBSInstitut.Institut für Technische InformatikAuthor: search.filters.author.Schwachhofer, Denis

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    Development of an infrastructure for creating a behavioral model of hardware of measurable parameters in dependency of executed software
    (2021) Schwachhofer, Denis
    System-Level Test (SLT) gains traction not only in the industry but as of recently also in academia. It is used to detect manufacturing defects not caught by previous test steps. The idea behind SLT is to embed the Design Under Test (DUT) in an environment and running software on it that corresponds to its end-user application. But even though it is increasingly used in manufacturing since a decade there are still many open challenges to solve. For example, there is no coverage metric for SLT. Also, tests are not automatically generated but manually composed using existing operating systems and programs. This master thesis introduces the foundation for the AutoGen project, that will tackle the aforementioned challenges in the future. This foundation contains a platform for experiments and a workflow to generate Systems-on-Chip (SoCs). A case study is conducted to show an example on how on-chip sensors can be used in SLT applications to replace missing detailed technology-information. For the case study a “power devil” application has been developed that aims to keep the temperature of the Field Programmable Gate Array (FPGA) it runs on in a target range. The study shows an example on how software and parameters influence the extra-functional behavior of hardware.
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    Fault emulation for reconfigurable scan networks
    (2018) Schwachhofer, Denis
    At around their standardization by the IEEE the interest on Reconfigurable Scan Networks (RSNs) by research and industry sparked. The testing of RSNs also raises new challenges. To analyze and cope with these challenges researchers are required to perform fault simulation. And the industry incorporated RSNs into their designs and need to test them to which also requires fault simulation. But the runtime of it is significantly high due to the RSNs’ structure. This thesis introduces a platform for fault emulation of RSNs and analyzes its feasibility. The speedup compared to fault simulation is presented and advantages, limitations and possible optimizations are evaluated and discussed.