05 Fakultät Informatik, Elektrotechnik und Informationstechnik
Permanent URI for this collectionhttps://elib.uni-stuttgart.de/handle/11682/6
Browse
4 results
Search Results
Item Open Access Novel characterization techniques for the study of the dynamic behavior of silicon carbide power MOSFETs(2022) Salcines, Cristino; Kallfass, Ingmar (Prof. Dr.-Ing.)This dissertation provides insight into the dynamic behavior of SiC power MOSFETs from their inherent static IV and CV characteristics. While conventional dynamic measurements extracted from a DPT or a similar dynamic test-bench yield accurate quantitative data, the static IV and CV characteristics of a power semiconductor device offer more qualitative information to delve into the root mechanisms responsible for its dynamic behavior. Conventional characterization techniques are limited to power levels way below those which the power device withstands in the application. As a result, the static IV and CV characteristics attained by available measurement solutions are reduced to a limited scope of bias conditions insufficient to infer information about the dynamic behavior of the power device. This work tackles this gap and proposes novel measurement techniques that enable the characterization of the static IV and CV characteristics of SiC power MOSFETs at the full range of bias conditions the power device goes through in the application. Iso-thermal IV characteristics of a commercially available SiC power MOSFET are measured up to 40 kW power (instantaneous 50 A and 800 V) at junction temperatures ranging from 25°C to 175 °C. The CV characteristics are mapped at drain-source and gate-source bias combinations of VDS = 0 - 40 V and VGS = 0 - 20 V, respectively, at junction temperatures ranging from 25°C to 150 °C. The results of these measurements reveal unique insights into the electrical characteristics of SiC power MOSFETs which impact their performance in the application and explain unclear phenomena observed in their dynamic behavior. On the one hand, the intrinsic capacitances of the SiC power MOSFET extend their non-linearity, function of both VGS and VDS, to the saturation region of the power device. Moreover, they are also affected by the junction temperature of the power device. The impact of these in the voltage commutation speed of the device under different switching conditions is thoroughly analyzed in the thesis. On the other hand, the IV characteristics of the SiC power MOSFET reveal the existence of short channel effects that drastically affect the transconductance of the power device in its high voltage saturation region. Furthermore, the measurements show a positive temperature coefficient of the drain current in the high voltage saturation region of the SiC power device, attributed to the density of trap energy states in the SiC/SiO2 interface. These effects effectively lower the plateau voltage of the device and lead to faster current commutation speeds in the application than those expected from the datasheet values. The insights revealed by the proposed characterization techniques are intended to help fine-tune semiconductor technology processes and improve the accuracy of simulation models to achieve a higher grade of optimization in the design of future SiC-based energy conversion circuits.Item Open Access Design of frequency-converting monolithic integrated circuits for millimeter-wave applications(2022) Grötsch, Christopher; Kallfass, Ingmar (Prof. Dr.-Ing.)This thesis focuses on how to efficiently utilize the low terahertz spectrum in the frequency range from 220 to 325 GHz, also called H-band. This work presents an introduction on several techniques necessary for designing frequency-converting monolithic millimeter-wave integrated circuits for this frequency range. Six different frequency-converter MMICs in a 35 nm gate-length InGaAs mHEMT technology are presented: a nonlinear resistance up- and down-converter, a dual-gate up and down-converter, a gate-pumped transconductance up-converter and a half Gilbert cell up-converter. Each design is explained in detail, their advantages and their disadvantages are evaluated. Three examples will be given where a selection of the frequency-converter architectures are integrated with other functional stages like frequency multipliers and amplifiers to form a millimeter-wave transceiver: a highly linear FMCW radar receiver with a 50 GHz bandwidth, a heterodyne communication receiver facilitating multi-channel transmissions with carrier aggregation at W-band and a homodyne communication receiver with an integrated antenna for low-cost assembly on a PCB. Thereby, this thesis provides insight into the design considerations of terahertz frequency converters, the trade-off of different circuit architectures and topologies for certain applications, the obstacles that can occur during their development and approaches to overcome them.Item Open Access A comparison of system architectures for wireless links in the terahertz band(2022) Dan, Iulia; Kallfass, Ingmar (Prof. Dr.-Ing.)This thesis shows an in-depth analysis of two system architecures used for future terahertz communication systems. For each architecture wireless data transmissions are carried out based on analog frontend devices that use that particular architecuture. The performance of the links is compared and the structure of the wireless links is described in detail and analyzed.Item Open Access Switching characteristics of integrated GaN-on-Si half-bridge and driver circuits(2021) Mönch, Stefan; Kallfass, Ingmar (Prof. Dr.-Ing.)This work examines particularities in the switching characteristics of gallium nitride (GaN) half-bridge and driver circuits, which arise from the integration on a common conductive silicon (Si) substrate, or from the operation of discrete devices on an electrically coupled Si substrate. The supposed advantages of monolithic integrated half-bridges and drivers are promising: The reduced parasitic interconnect inductance improves voltage-switching transitions. The Si carrier allows low-cost and large-scale fabrication. A single integrated IC simplifies the assembly compared to conventional multi-chip power modules. However, the operation of such monolithic GaN-on-Si power circuits also evokes substrate-related effects, especially at elevated operation voltages, which were previously not relevant for single low-side GaN HEMTs. On the one hand, deteriorating effects such as on-resistance increase by negative substrate biasing (back-gating) have to be considered. On the other hand, beneficial effects such as the possibility of decoupling of substrate capacitances can be exploited for reduction of switching energies and consequently increased efficiencies compared to conventional discrete GaN power transistors. Furthermore, even though the monolithic integration of a gate driver with a power transistor reduces the interconnect parasitics between the driver and the transistor, still external interconnects to decoupling capacitors are required. The monolithic integration of half-bridges and drivers thus does not fully eliminate parasitic gate-loop and power-loop inductance. Therefore, advanced assembly technologies such as PCB-embedding of GaN-based power integrated circuits should also be considered in combination with the monolithic circuit integration. First, this work provides a theoretical framework to calculate and compare the effect of substrate-capacitances on application-oriented half-bridge capacitances for different feasible substrate terminations of discrete and monolithic GaN-on-Si half-bridges. It is explained and verified how floating substrate terminations reduce the effective output capacitances. To harness the benefits of this reduced effective capacitances, an improved passive substrate biasing network for monolithic half-bridges is proposed and experimentally verified: The proposed operation scheme for monolithic half-bridges avoids negative back-gating in all operation points of a dc-dc converter and at the same time has reduced effective output capacitance compared to a discrete half-bridge. Experimental operation of a monolithic half-bridge with the proposed substrate biasing network shows increased efficiency compared to a discrete half-bridge and verifies the effectiveness of the proposed duty-cycle independent floating substrate biasing. Compared to a conventional discrete half-bridge with two substrate-to-source terminated transistors, this work's operation scheme for a monolithic half-bridge in a dc-dc converter with 200 V input voltage, 100 V output voltage, 1.5 A load current and 100 kHz switching frequency, reduced the switching energies by over 20%, and the total power loss in a dc-dc converter by over 10%. This efficiency improvement is the results of this work's beneficial combination of a (semi-)floating substrate which reduces the effective output capacitance, and the novel substrate biasing network which avoids negative back-gating during conduction phases by shifting the average substrate voltage towards higher values. Then, this work work analyzes high slew-rate voltage switching transitions and the effect of parasitic inductance in the power-loop on switch-node overshoot voltage. An equivalent circuit analysis is carried out, which takes the limited voltage slew-rate of a power transistor into account. In contrast to a simplified RLC-circuit analysis with a infinitely fast voltage excitation pulse, this work analytically provides insight into the dependency of switch-node overshoot voltage on the voltage transition time. Even though the power-loop is almost undamped due to the low on-resistance of the transistors, the analysis shows that local minima of overshoot as a function of switching time exist, and by selection of optimal switching times it is possible to minimize the overshoot without a significant reduction of switching speed. Furthermore, an advanced PCB-embedded packaging technology is combined with on-package gate and dc-link capacitors, which further reduces parasitic inductance of GaN half-bridges with integrated drivers. Finally, this work exposes that the substrate-to-source termination of a lateral GaN power transistor, which is typically realized on the packaging level, forms a third parasitic loop. In addition to the well-known parasitic gate-loop and power-loop inductance, this work analyzes the effects of this substrate-loop inductance. An analytical and experimental stability analysis is carried out. Countermeasures are proposed to avoid instabilities from the parasitic-substrate loop. A substrate damping circuit is proposed, which avoids instabilities by damping of the substrate-loop, without slowing down of the switching transition. The experimental and theoretical investigation and results of this work on the switching characteristic of GaN-on-Si half-bridges with drivers on conductive Si substrates contributes to unlock the benefits of GaN HEMTs and monolithic power circuit integration for compact, clean switching and highly efficient power electronics.