05 Fakultät Informatik, Elektrotechnik und Informationstechnik
Permanent URI for this collectionhttps://elib.uni-stuttgart.de/handle/11682/6
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Item Open Access Low-field chip-based Overhauser dynamic nuclear polarization platforms(2026) Yang, Qing; Anders, Jens (Prof. Dr.)Item Open Access Methodology to qualify batteries for safety-critical vehicle applications(2025) Conradt, Rafael; Birke, Kai Peter (Prof. Dr.-Ing.)Item Open Access Challenges of computational social science analysis with NLP methods(2022) Dayanik, Erenay; Padó, Sebastian (Prof. Dr.)Computational Social Science (CSS) is an emerging research area at the intersection of social science and computer science, where problems of societal relevance can be addressed by novel computational methods. With the recent advances in machine learning and natural language processing as well as the availability of textual data, CSS has opened up to new possibilities, but also methodological challenges. In this thesis, we present a line of work on developing methods and addressing challenges in terms of data annotation and modeling for computational political science and social media analysis, two highly popular and active research areas within CSS. In the first part of the thesis, we focus on a use case from computational political science, namely Discourse Network Analysis (DNA), a framework that aims at analyzing the structures behind complex societal discussions. We investigate how this style of analysis, which is traditionally performed manually, can be automated. We start by providing a requirement analysis outlining a roadmap to decompose the complex DNA task into several conceptually simpler sub-tasks. Then, we introduce NLP models with various configurations to automate two of the sub-tasks given by the requirement analysis, namely claim detection and classification, based on different neural network architectures ranging from unidirectional LSTMs to Transformer based architectures. In the second part of the thesis, we shift our focus to fairness, a central concern in CSS. Our goal in this part of the thesis is to analyze and improve the performances of NLP models used in CSS in terms of fairness and robustness while maintaining their overall performance. With that in mind, we first analyze the above-mentioned claim detection and classification models and propose techniques to improve model fairness and overall performance. After that, we broaden our focus to social media analysis, another highly active subdomain of CSS. Here, we study text classification of the correlated attributes, which pose an important but often overlooked challenge to model fairness. Our last contribution is to discuss the limitations of the current statistical methods applied for bias identification; to propose a multivariate regression based approach; and to show that, through experiments conducted on social media data, it can be used as a complementary method for bias identification and analysis tasks. Overall, our work takes a step towards increasing the understanding of challenges of computational social science. We hope that both political scientists and NLP scholars can make use of the insights from this thesis in their research.Item Open Access Stochastic neural networks : components, analysis, limitations(2022) Neugebauer, Florian; Polian, Ilia (Prof. Dr.)Stochastic computing (SC) promises an area and power-efficient alternative to conventional binary implementations of many important arithmetic functions. SC achieves this by employing a stream-based number format called Stochastic numbers (SNs), which enables bit-sequential computations, in contrast to conventional binary computations that are performed on entire words at once. An SN encodes a value probabilistically with equal weight for every bit in the stream. This encoding results in approximate computations, causing a trade-off between power consumption, area and computation accuracy. The prime example for efficient computation in SC is multiplication, which can be performed with only a single gate. SC is therefore an attractive alternative to conventional binary implementations in applications that contain a large number of basic arithmetic operations and are able to tolerate the approximate nature of SC. The most widely considered class of applications in this regard is neural networks (NNs), with convolutional neural networks (CNNs) as the prime target for SC. In recent years, steady advances have been made in the implementation of SC-based CNNs (SCNNs). At the same time however, a number of challenges have been identified as well: SCNNs need to handle large amounts of data, which has to be converted from conventional binary format into SNs. This conversion is hardware intensive and takes up a significant portion of a stochastic circuit's area, especially if the SNs have to be generated independently of each other. Furthermore, some commonly used functions in CNNs, such as max-pooling, have no exact corresponding SC implementation, which reduces the accuracy of SCNNs. The first part of this work proposes solutions to these challenges by introducing new stochastic components: A new stochastic number generator (SNG) that is able to generate a large number of SNs at the same time and a stochastic maximum circuit that enables an accurate implementation of max-pooling operations in SCNNs. In addition, the first part of this work presents a detailed investigation of the behaviour of an SCNN and its components under timing errors. The error tolerance of SC is often quoted as one of its advantages, stemming from the fact that any single bit of an SN contributes only very little to its value. In contrast, bits in conventional binary formats have different weights and can contribute as much as 50\% of a number's value. SC is therefore a candidate for extreme low-power systems, as it could potentially tolerate timing errors that appear in such environments. While the error tolerance of SC image processing systems has been demonstrated before, a detailed investigation into SCNNs in this regard has been missing so far. It will be shown that SC is not error tolerant in general, but rather that SC components behave differently even if they implement the same function, and that error tolerance of an SC system further depends on the error model. In the second part of this work, a theoretical analysis into the accuracy and limitations of SC systems is presented. An existing framework to analyse and manage the accuracy of combinational stochastic circuits is extended to cover sequential circuits. This framework enables a designer to predict the effect of small design changes on the accuracy of a circuit and determine important parameters such as SN length without extensive simulations. It will further be shown that the functions that are possible to implement in SC are limited. Due to the probabilistic nature of SC, some arithmetic functions suffer from a small bias when implemented as a stochastic circuit, including the max-pooling function in SCNNs.Item Open Access Novel characterization techniques for the study of the dynamic behavior of silicon carbide power MOSFETs(2022) Salcines, Cristino; Kallfass, Ingmar (Prof. Dr.-Ing.)This dissertation provides insight into the dynamic behavior of SiC power MOSFETs from their inherent static IV and CV characteristics. While conventional dynamic measurements extracted from a DPT or a similar dynamic test-bench yield accurate quantitative data, the static IV and CV characteristics of a power semiconductor device offer more qualitative information to delve into the root mechanisms responsible for its dynamic behavior. Conventional characterization techniques are limited to power levels way below those which the power device withstands in the application. As a result, the static IV and CV characteristics attained by available measurement solutions are reduced to a limited scope of bias conditions insufficient to infer information about the dynamic behavior of the power device. This work tackles this gap and proposes novel measurement techniques that enable the characterization of the static IV and CV characteristics of SiC power MOSFETs at the full range of bias conditions the power device goes through in the application. Iso-thermal IV characteristics of a commercially available SiC power MOSFET are measured up to 40 kW power (instantaneous 50 A and 800 V) at junction temperatures ranging from 25°C to 175 °C. The CV characteristics are mapped at drain-source and gate-source bias combinations of VDS = 0 - 40 V and VGS = 0 - 20 V, respectively, at junction temperatures ranging from 25°C to 150 °C. The results of these measurements reveal unique insights into the electrical characteristics of SiC power MOSFETs which impact their performance in the application and explain unclear phenomena observed in their dynamic behavior. On the one hand, the intrinsic capacitances of the SiC power MOSFET extend their non-linearity, function of both VGS and VDS, to the saturation region of the power device. Moreover, they are also affected by the junction temperature of the power device. The impact of these in the voltage commutation speed of the device under different switching conditions is thoroughly analyzed in the thesis. On the other hand, the IV characteristics of the SiC power MOSFET reveal the existence of short channel effects that drastically affect the transconductance of the power device in its high voltage saturation region. Furthermore, the measurements show a positive temperature coefficient of the drain current in the high voltage saturation region of the SiC power device, attributed to the density of trap energy states in the SiC/SiO2 interface. These effects effectively lower the plateau voltage of the device and lead to faster current commutation speeds in the application than those expected from the datasheet values. The insights revealed by the proposed characterization techniques are intended to help fine-tune semiconductor technology processes and improve the accuracy of simulation models to achieve a higher grade of optimization in the design of future SiC-based energy conversion circuits.Item Open Access Architectural refactoring to microservices : a quality-driven methodology for modernizing monolithic applications(2024) Fritzsch, Jonas; Wagner, Stefan (Prof. Dr.)Context and Problem: The microservices architectural style has revolutionized the way modern software systems are developed and operated, and has become the de facto standard for cloud-based applications. However, existing systems are often designed as monoliths, which are associated with inflexible processes, long release cycles, and an architecture incapable of leveraging the advantages of cloud environments. The adoption of microservices would require an architectural refactoring, entailing redevelopments of parts or even the entire application. Often associated with extensive manual effort, the targeted, quality-oriented, and semi-automated decomposition into a set of self-contained services remains problematic. Software architects look for resource-efficient ways to provide predictable results and guidance in this highly individual process. Objective: To systematically guide software architects and developers in modernizing their software systems, we seek to provide a holistic methodology for systematic and quality-driven migrations towards microservices. As part of it, we search solutions for the targeted and automated decomposition into services, and ways to support a quality-oriented design based on established patterns and best practices. Our work aims to provide industry-relevant methods that address the gap between academia and practice by facilitating the transfer of knowledge. Methods: In an overarching design science research process, we create a migration methodology that we implement as a web-based application. For analysis and evaluation, we apply established methods in empirical software engineering, such as case study research, surveys, and semi-structured interviews with experts. Our secondary research to summarize the current state of scientific advances relies on consecutive literature searches and rapid reviews, a lightweight method derived from systematic reviews. Contributions: Based on two primary empirical interview studies with 25 software professionals, we collected evidence on the intentions, strategies, and challenges of migrating monolithic applications to microservices, complemented by requirements for tool support and automation. Over four iterations, we reviewed 110 scientific publications on approaches for architectural refactoring and migration to microservices. To guide architects and developers in a migration process, we conceptualized a framework, along with a dedicated quality model that reflects a quality-driven migration process. Based on latest technologies and a modern user interface design, we realized our concept as a web-based application in an agile development process with early involvement of potential users. In a multi-faceted evaluation, we examined its ability to provide actionable guidance for practitioners. To this end, we conducted three surveys and one interview study with a total of 26 participants, complemented by two longitudinal case studies in an industrial context. Conclusion: We propose a holistic methodology for modernizing monolithic applications to microservices that comprises a framework and a dedicated quality model. Our contributions support architects in making informed decisions about microservices adoption, and furthermore guide them through a systematic transformation process. The evaluations showed an overall positive result in terms of effectiveness, usefulness, and usability, while both case studies demonstrated a successful application in an industrial environment. By sharing important study artifacts, we support researchers developing industry-focused methods, who can profit from our insights and experiences. Moreover, we regard our design science approach to leveraging academic research by practice as transferable to other scientific disciplines.Item Open Access Ultra-broadband analog demultiplexer for optical and wireline receivers(2024) Thomas, Philipp; Berroth, Manfred (Prof. Dr.-Ing.)Metropolitan internet nodes, data centers, and mobile base stations build the backbone of our modern information-based infrastructure. Wavelength, polarization, time, and space division multiplexing are effective means to increase optical channel data rates between these stations. To enable new Ethernet standards with 800 Gbit/s and 1.6 Tbit/s, electronic receivers need faster analog front ends than today. Silicon-Germanium (SiGe) bipolar transistor technologies can provide the necessary performance and can contribute to cost-efficient receivers integrated with digital signal processors (DSP) with complementary metal-oxide semiconductors (CMOS) that feature smallest structures of down to 5 nm as of today. This work presents the design of analog demultiplexers (ADeMUX) in two different variants, which can realize this promise through presampling. The voltage mode (VM) version of the ADeMUX employs switched preamplifiers to slice the input signal and reduce the required sampler bandwidth, as well as switched emitter followers as sampling elements for this purpose, resulting in a significant overall bandwidth increase. The measured bandwidth of this ADeMUX version is higher than 57 GHz at 128 GS/s and represents a record value at such a high sampling rate. Furthermore, the clock duty cycle of 50% in the VM ADeMUX is simple to realize in the clock driver and allows to operate this device at up to 200 GS/s in experiments, which is the highest sampling rate reported in silicon technology. The current mode (CM) version of the ADeMUX integrates a signal current onto a hold capacitance to generate an equivalent voltage. Each of the four output channels uses 25% of their total clock period for this current integration. Another 25% are dedicated to removing the accumulated charge and thus resetting the voltage on the hold capacitance after the hold mode. The characterization of the CM ADeMUX shows 36 GHz bandwidth at 128 GS/s input sampling rate, as well as more than 3 bit accuracy up to 50 GHz. In a data transmission experiment with digital predistortion, four-level pulse amplitude modulation, and digital postprocessing, this analog front end shows the reception of data at 256 Gbit/s for the first time in a silicon technology. Overall, the realized ADeMUX devices in SiGe technology could contribute to extending data rates in coherent optical transmission channels to more than 1 Tbit/s per wavelength without having to sacrifice the high integration density of CMOS DSPs.Item Open Access Understanding and adapting to user mental models in task-oriented dialog(2026) Vanderlyn, Lindsey; Vu, Ngoc Thang (Prof. Dr.)Item Open Access Eine musterbasierte Methode für die Entwicklung und den Betrieb hybrider Quantenanwendungen(2025) Beisel, Martin; Leymann, Frank (Prof. Dr. Dr. h. c.)Quantencomputer ermöglichen es, bestimmte Berechnungen schneller, genauer und energieeffizienter durchzuführen als klassische Computer, indem sie quantenmechanische Phänomene ausnutzen. Da die Umsetzung der meisten Quantenalgorithmen allerdings Operationen benötigt für die Quantencomputer ungeeignet sind, z. B. Datenbankzugriffe, werden Quantencomputer typischerweise als Spezialprozessoren in hybriden Quantenanwendungen verwendet. Die Entwicklung und der Betrieb dieser hybriden Anwendungen sind komplex und erfordern eine enge interdisziplinäre Zusammenarbeit. Dabei wird tiefgreifendes Wissen aus unterschiedlichen Domänen benötigt, beispielsweise aus der Mathematik, Physik und Softwareentwicklung. Zusätzlich wird die Entwicklung und der Betrieb von Quantenanwendungen durch weitere Faktoren erschwert: (i) Die aktuelle Quantensoftwarelandschaft und die verfügbaren Quanten-Clouddienste, die Zugriff auf unterschiedliche Quantencomputer geben, sind sehr heterogen. (ii) Die schnellen Fortschritte im Quanten-Software-Engineering führen zur Einführung neuer Techniken, welche die Ausführung von Quantenschaltkreisen verbessern können, allerdings aktuell eine komplexe, manuelle Integration erfordern. (iii) Das Fehlen geeigneter Abstraktionsebenen führt dazu, dass die Entwicklung von Quantenanwendungen, insbesondere für Entwickler, die wenig Erfahrung mit Quantencomputing haben, zeitaufwändig und fehleranfällig ist. Um diese Probleme zu lösen, wird in dieser Arbeit die PASTA-Methode präsentiert. Diese basiert auf der Quantencomputingmustersprache, welche etablierte Konzepte und Best Practices in der Quantencomputingdomäne intuitiv verständlich dokumentiert, und stellt einen ganzheitlichen Prozess für diemusterbasierten Entwicklung und den Betrieb von Quantenanwendungen vor. Die Methode beinhaltet alle notwendigen Schritte von der Auswahl der zu verwendenden Quantencomputingmuster, über die Generierung der ausführbaren Quantenanwendung auf Basis wiederverwendbarer Lösungen sowie die Bereitstellung der erforderlichen Softwareartefakte, bis hin zur Überwachung und Analyse der Ausführung hybrider Quantenanwendungen. Zur Umsetzung der PASTA-Methode wird im Rahmen dieser Arbeit die Quantencomputingmustersprache um mehrere Muster erweitert, welche Best Practices für den Betrieb von hybriden Quantenanwendungen sowie etablierte Methoden zur Abschwächung und Korrektur von Quantenfehlern dokumentieren. Um die vom Nutzer ausgewählten Muster in einen ausführbaren Quantenworkflow transformieren zu können, werden eine Vielzahl neuer Workflowmodellierungskonstrukte eingeführt, welche die Spezifikation verschiedener, häufig auftretender Aktivitäten in Quantenworkflows vereinfachen. Weiterhin wird ein Ansatz für die automatische und dynamische Bereitstellung von hybriden Quantenanwendungen auf Grundlage von Nutzeranforderungen vorgestellt. Auf diesen Konzepten aufbauend werden neue Sichten auf Quantenworkflows eingeführt, welche die Überwachung und Analyse von hybriden Quantenanwendungen vereinfachen. Die Sichten ermöglichen es unterschiedlichen Nutzergruppen, wie beispielsweise Quantenexperten und dem Betriebspersonal, Quantenanwendungen auf verschiedenen Abstraktionsebenen zu analysieren und bieten zusätzliche, für die jeweilige Nutzergruppe relevante Informationen. Zur Demonstration der praktischen Umsetzbarkeit der PASTA-Methode wird das PASTA-Framework eingeführt, welches die in dieser Arbeit eingeführten Konzepte prototypisch implementiert. Die Nutzbarkeit der Methode und des Frameworks werden anhand mehrerer Anwendungsfälle evaluiert, für welche eine Laufzeitanalyse sowie eine Nutzerstudie durchgeführt wird.Item Open Access Design of frequency-converting monolithic integrated circuits for millimeter-wave applications(2022) Grötsch, Christopher; Kallfass, Ingmar (Prof. Dr.-Ing.)This thesis focuses on how to efficiently utilize the low terahertz spectrum in the frequency range from 220 to 325 GHz, also called H-band. This work presents an introduction on several techniques necessary for designing frequency-converting monolithic millimeter-wave integrated circuits for this frequency range. Six different frequency-converter MMICs in a 35 nm gate-length InGaAs mHEMT technology are presented: a nonlinear resistance up- and down-converter, a dual-gate up and down-converter, a gate-pumped transconductance up-converter and a half Gilbert cell up-converter. Each design is explained in detail, their advantages and their disadvantages are evaluated. Three examples will be given where a selection of the frequency-converter architectures are integrated with other functional stages like frequency multipliers and amplifiers to form a millimeter-wave transceiver: a highly linear FMCW radar receiver with a 50 GHz bandwidth, a heterodyne communication receiver facilitating multi-channel transmissions with carrier aggregation at W-band and a homodyne communication receiver with an integrated antenna for low-cost assembly on a PCB. Thereby, this thesis provides insight into the design considerations of terahertz frequency converters, the trade-off of different circuit architectures and topologies for certain applications, the obstacles that can occur during their development and approaches to overcome them.