Universität Stuttgart

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    Modeling of a multi-core microblaze system at RTL and TLM abstraction levels in systemC
    (2013) Eissa, Karim
    Transaction Level Modeling (TLM) has recently become a popular approach for modeling contemporary Systems-on-Chip (SoCs) on a higher abstraction level than Register Transfer Level (RTL). In this thesis a multi-core system based on the Xilinx MicroBlaze micro-processor is modeled at RTL and TLM abstraction levels in SystemC. Both implemented models have cycle accurate timing, and are verified against the reference VHDL model using a VHDL / SystemC mixed-language simulation with ModelSim. Finally, performance measurements are carried out to evaluate simulation speedup at the transaction level. Modeling of the MicroBlaze processor is based on a MicroBlaze Instruction Set Simulator (ISS) from SoCLib. A wrapper is therefore implemented to provide communication interfaces between the processor and the rest of the system, as well as control the timing of the ISS operation to reach cycle accurate models. Furthermore, a local memory module based on Block Random Access Memories (BRAMs) is modeled to simulate a complete system consisting of a processor and a local memory.
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    Thermal imaging for interactive surfaces
    (2013) Abdelrahman, Yomna
    Thermal camera operating in Far Infrared (FIR) is considered to be un- derexplored in elds other than security and law enforcement. Nevertheless, recently it drawn the attention of Human Computer Interaction (HCI) re- searchers as a new sensory system enabling novel interactive systems. They are robust to illumination changes and using it with well-known computer vi- sion techniques, the complexity of the interaction detection is highly reduced as compared to RGB and depth cameras. FIR radiation, however, has an- other undiscovered characteristic that distinguishes thermal cameras from their RGB or depth counterparts, namely thermal re ection. Commonly, surfaces re ect thermal radiation differently than visual light and can be- come a perfect thermal mirror. In this thesis, we show that through thermal re ection, thermal cameras can sense the space beyond their direct eld of view (areas besides and even behind the camera' eld of view). We investi- gate how thermal re ection can potentially increase the interaction space of projected surfaces using camera-projection systems. We moreover discuss the re ection characteristics of common surfaces in our vicinity in both the visual and thermal radiation bands. Using a proof-of-concept prototype, we demonstrate the increased interaction space for hand-held camera-projection system. Furthermore, we depict a number of other promising application examples that can largely bene t from the thermal re ection characteristic of surfaces
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    Providing in-network content-based routing using OpenFlow
    (2013) Mishra, Gagan Bihari
    Content-based routing as provided by publish/subscribe systems has evolved as a key paradigm for interactions between loosely coupled application components (content publishers and subscribers). Content-based routing aims to increase the efficiency of forwarding by utilizing the diversity of information exchanged between application components. Using content-based forwarding rules (also called content filters) installed on content-basedrouters (also termed brokers), bandwidth-efficiency is increased by only forwarding content to the subset of subscribers who are actually interested in the published content. Many middle-ware implementations for content-based publish/subscribe have been developed over the last decade. However, implemented on the application layer, their performance is still far behind the performance of communication protocols implemented on the network layer w.r.t. throughput, end-to-end latency and bandwidth efficiency. Therefore, it would be highly attractive to implement content-based routing directly on the network layer. Especially, the advent of new networking technologies namely, software-define networking and network virtualization have potential to make this reality. To this end, recently a reference architecture has been proposed allowing for the embedding of content-based routing at the network layer by utilizing OpenFlow specification. The task of this thesis is the concrete realization of content-based routing in the OpenFlow reference architecture. In particular, the thesis focuses on the implementation/embedding of filtering-based publish/subscribe approaches in the reference architecture, as a proof of concept. The implementation is then evaluated w.r.t. message forwarding delay, false positives etc.
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    Analysis of cache usability on modern real-time systems
    (2013) Almheidat, Ahmad Nuraldin Faleh
    Cache memories are used in the microprocessors to close the speed gap between the processor and the main memory. Caches can minimize the memory access time by keeping a copy of the highly demanded data closer to the processor. As a result, the overall program execution time is reduced. In safety-critical real-time systems, a worst-case analysis is required, and therefore the cache memories play an essential role in the estimation of the application's worst-case execution time. A simulation tool for the cache structure was developed to provide estimated measurements for both cache predictability and the worst-case memory access time based on the used architectural model. This may help to draw some conclusions about the actual cache operation. The simulation supports several modern uni-core and multi-core architectures, including some used in real-time systems. It also allows configuring different cache structures and hierarchies. The cache architecture, configuration and memory accesses from a simulated running application are specified by the user via an input file. The simulation provides a list of traces for every access. The cache predictability can be formulated as hit and miss rates. At the same time, the traces can be used to estimate total memory access time.
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    Identifiability and sensitivity analysis of heterogeneous cell population models
    (2013) Zeng, Shen
    In this thesis, we introduce novel concepts to the modeling and analysis of heterogeneous cell populations. Heterogeneous cell populations can be interpreted as large populations of structurally identical cells with heterogeneous parameters and initial conditions. They appear in biological systems such as tissues of higher organisms or colonies of microorganisms. A well-known approach for the modeling of heterogeneous cell populations is the so called density-based approach, in which the state of a heterogeneous cell population is given by the probability density of the cell states. The evolution of the probability densities is in this approach given in terms of a partial differential equation. We extend this approach via a measure theoretical consideration, which exploits the probabilistic nature of the problem. The result of this novel ansatz is a framework in which the evolution of densities is described by operators. One of the key tasks in the analysis of heterogeneous cell population models is parameter estimation. For heterogeneous cell populations we want to estimate the probability density of parameters and initial conditions. However, to be able to perform parameter estimation, one always needs specific identifiability properties of a system. We formulate for the first time the concept of structural identifiability of a heterogeneous cell population model. It is revealed that this concept is closely related to observability of the corresponding single cell model. The connection between both concepts is studied and illuminated in a concrete example. The second emphasis of this thesis is the implementation of sensitivity analysis to the class of heterogeneous cell population models. Here we study sensitivity with respect to variations or misspecifications in the probability density of parameters and initial conditions.
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    Embedding deterministic patterns in partial pseudo-exhaustive test
    (2013) Sannikova, Anastasia
    The topic of this thesis is related to testing of very large scale integration circuits. The thesis presents the idea of optimizing mixed-mode built-in self-test (BIST) scheme. Mixed-mode BIST consists of two phases. The first phase is pseudo-random testing or partial pseudo-exhaustive testing (P-PET). For the faults not detected by the first phase, deterministic test patterns are generated and applied in the second phase. Hence, the defect coverage of the first phase influences the number of patterns to be generated and stored. The advantages of P-PET in comparison with usual pseudo-random test are in obtaining higher fault coverage and reducing the number of deterministic patterns in the second phase of mixed-mode BIST. Test pattern generation for P-PET is achieved by selecting characteristic polynomials of multiple-polynomial linear feedback shift register (MP-LFSR). In this thesis, the mixed-mode BIST scheme with P-PET in the first phase is further improved in terms of the fault coverage of the first phase. This is achieved by optimization of polynomial selection of P-PET. In usual mixed-mode BIST, the set of undetected by the first phase faults is handled in the second phase by generating deterministic test patterns for them. The method in the thesis is based on consideration of these patterns during polynomial selection. In other words, we are embedding deterministic test patterns in P-PET. In order to solve the problem, the algorithm for the selection of characteristic polynomials covering the pre-generated patterns is developed. The advantages of the proposed approach in terms of the defect coverage and the number of faults left after the first phase are presented using contemporary industrial circuits. A comparison with usual pseudo-random testing is also performed. The results prove the benefits of P-PET with embedded test patterns in terms of the fault coverage, while maintaining comparable test length and time.
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    Online self-test wrapper for runtime-reconfigurable systems
    (2013) Wang, Jiling
    Reconfigurable Systems-on-a-Chip (SoC) architectures consist of microprocessors and Field Programmable Gate Arrays (FPGAs). In order to implement runtime reconfigurable systems, these SoC devices combine the ease of programmability and the flexibility that FPGAs provide. One representative of these is the new Xilinx Zynq-7000 Extensible Processing Platform (EPP), which integrates a dual-core ARM Cortex-A9 based Processing System (PS) and Programmable Logic (PL) in a single device. After power on, the PS is booted and the PL can subsequently be configured and reconfigured by the PS. Recent FPGA technologies incorporate the dynamic Partial Reconfiguration (PR) feature. PR allows new functionality to be programmed online into specific regions of the FPGA while the performance and functionality of the remaining logic is preserved. This on-the-fly reconfiguration characteristic enables designers to time-multiplex portions of hardware dynamically, load functions into the FPGA on an as-needed basis. The configuration access port on the FPGA can be used to load the configuration data from memory to the reconfigurable block, which enables the user to reconfigure the FPGA online and test runtime systems. Manufactured in the advanced 28 nm technologies, the modern generations of FPGAs are increasingly prone to latent defects and aging-related failure mechanisms. To detect faults contained in the reconfigurable gate arrays, dedicated on and off-line test methods can be employed to test the device in the field. Adaptive systems require that the fault is detected and localized, so that the faulty logic unit will not be used in future reconfiguration steps. This thesis presents the development and evaluation of a self-test wrapper for the reconfigurable parts in such hybrid SoCs. It comprises the implementation of Test Configurations (TCs) of reconfigurable components as well as the generation and application of appropriate test stimuli and response analysis. The self-test wrapper is successfully implemented and is fully compatible with the AMBA protocols. The TC implementation is based on an existing Java framework for Xilinx Virtex-5 FPGA, and extended to the Zynq-7000 EPP family. These TCs are successfully redesigned to have a full logic coverage of FPGA structures. Furthermore, the array-based testing method is adopted and the tests can be applied to any part of the reconfigurable fabric. A complete software project has been developed and built to allow the reconfiguration process to be triggered by the ARM microprocessor. Functional test of the reconfigurable architecture, online self-test execution and retrieval of results are under the control of the embedded processor. Implementation results and analysis demonstrate that TCs are successfully synthesized and can be dynamically reconfigured into the area under test, and subsequent tests can be performed accordingly.
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    Microwave heating of plasmas with the new 14 GHz system at the stellarator TJ-K
    (2013) Loiten, Michael
    The aim of this thesis has been to investigate the plasmas generated by the newly installed 14 GHz microwave heating system at TJ-K in the equilibrium state. The new heating system has been installed in order to operate TJ-K at a wider range of controllable parameters. Several diagnostics have been used to investigate the plasma: An interferometer was used to obtain the line averaged density. A radially movable device with three Langmuir probes was used to obtain the radial profiles of the electron density and the electron temperature. An optical diode was used to obtain the radiation mainly in the visible range, whereas a bolometer with eight channels was used in order to obtain the poloidal radiation profiles. In addition, the neutral gas pressure, the magnetic field (based on the current running through the coils), and the injected and reflected microwave power was measured. Magnetic and pressure scans in the new regime have been performed, meaning that the scanned parameter has been varied on a shot to shot basis, whereas the other parameters have been kept constant. In addition to increase the parameter space, the magnetic field has been varied in order to vary the power deposition in the plasmas. The pressure has been varied in order to approach regimes where neoclassical effects become important. When lowering the collisionality, collisional regimes where neoclassical effects dominates can be reached. Lower collisional regimes were found for low pressures in hydrogen. However, operation at these collisional regimes is not readily available as it was found that the plasmas become increasingly unstable when closing in on these regimes. With this heating system one can operate at higher magnetic fields, and thus increase the confinement of the plasma. It has been found that plasmas in this regime have higher densities than the previously installed heating systems. This makes the new heating system a good candidate in studying over-dense plasmas.
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    Energy-proportional machines for cloud data centers
    (2013) Francato, Arturo
    Today's concern is about the energy efficiency of servers and high power machines in a cloud datacenter infrastructure. According to Barroso et al. [1], an ideal machine consumes energy proportional to the work performed. In this case, an idle machine should consume no energy and a machine in operation should only consume energy proportionally to the number of tasks performed. Even though the energy efficiency of machines is constantly improving, they are still not perfectly energy-proportional. Therefore, Dürr proposed the concept of Elastic Tandem Machines Instances (ETMI) in [2] aims to improve the energy efficiency in particular for idle and weakly loaded instances. In this thesis, we attempt to improve the concept of Elastic Tandem Machines. The original concept only integrated one low-power system on a chip (SoC) machine, which operates during low load on the datacenter, and exactly one high-power vir- tual machine(VM) instance, powered on when the traffic increases and needs to be redirected. However, if the performance of the SoC and the VM instance differed too much, the efficiency of the approach suffered since at the performance limit of the SoC, when the transferred occurred, the high-power would be almost idle. There- fore, we integrate different performance classes of VMs (e.g., small, medium, and large instances) into Elastic n-Instance Machines to further improve the efficiency and scalability of the system. We then design a predictive algorithm and integrate it with the ETMI to decide, in advance, when the best time is, before overloading any server, to switch among the instances. The handover algorithm, based on a software-defined networking and the pre- dictive algorithm, based on an Autoregressive Integrated Moving Average (ARIMA) model are presented. The performance of the system with respect to the energy efficiency and machine elasticity is evaluated using experiments and performance benchmarks. The evaluations of the model demonstrate the applicability of low and medium power instances serving low and medium loads efficiently, in addition to the scalability of the solution among n-instances. The predictive method shows satisfactory results when forecasting seasonal data, different models may have to be implemented for non-seasonal series.
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    Delay characterization in FPGA-based reconfigurable systems
    (2013) Zhang, Shihao
    Runtime reconfigurable architectures accelerate the operation of a standard processor core by hardware accelerators implemented in Field Programmable Gate Arrays (FPGAs). Partial runtime reconfiguration allows the hardware accelerators to efficiently adapt to different computational tasks dynamically. Nowadays, the FPGAs from major vendors, such as Xilinx and Altera, support this feature, including the Xilinx Virtex-5 FPGA family which is the implementation platform of this work. Manufactured at 28 nm scaled technological node or lower, concerns rise about the impact of aging-related failure mechanisms on the modern generations of FPGAs. To detect degradation in the reconfigurable gate arrays, dedicated on- and offline test methods must be employed in the field. Design for dependability requires that the degradation is detected and localized, so that the degraded logic elements will not be used as a first choice in the reconfiguration. This thesis presents the development and the evaluation of a delay characterization method for FPGA CLBs which comprise most of the FPGA logic elements. The purpose of FPGA delay characterization method in this work is to detect and localize the delay variance. This delay variance information may be used for achieving a speed optimized reconfiguration for a FPGA-based runtime system. Different delay characterization methods have been studied in this thesis for determining a suitable method to be implemented in the partial reconfigurable system. The delay characterization is performed in a part of area in the FPGA before a module is placed in this area to avoid the degraded portion. This thesis uses low level hardware description language to generate the fine-grained measurement units which can cover the target area. VHDL is used to generate the test wrapper, control circuit, and the circuit for communicating between the FPGA and the workstation. Several measurement techniques are used to evaluate the accuracy of the delay characterization method. Additionally, this thesis evaluates the temperature influence on the delay characterization. The results show that this delay characterization method can compare the speed of logic elements in the partial runtime reconfiguration area with high accuracy. The degradation can be detected and localized. The results also show that this method can be adapted to different size and location, fitting in the partial runtime reconfigurable design. Twelve configurations are required to have a full coverage of all the CLBs in the area under test.