Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-8189
Authors: Thiede, Andreas
Berroth, Manfred
Hurm, Volker
Nowotny, Ulrich
Seibel, Jörg
Gotzeina, W.
Sedler, Martin
Raynor, Brian
Köhler, Klaus
Hofmann, Peter
Hülsmann, Axel
Kaufel, Gudrun
Schneider, Joachim
Title: 16 x 16 bit parallel multiplier based on 6 K gate array with 0.3 μm AlGaAs/GaAs quantum well transistors
Issue Date: 1992
metadata.ubs.publikation.typ: Zeitschriftenartikel
metadata.ubs.publikation.source: Electronics letters 28 (1992), S. 1005-1007. URL http:/dx.doi.org./ 10.1049/el:19920639
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92393
http://elib.uni-stuttgart.de/handle/11682/8206
http://dx.doi.org/10.18419/opus-8189
Abstract: The design and performance of a 16x16 bit parallel multiplier based on a 6 K gate array will be presented. This LSI semicustom IC demonstrates the high potential of the authors' AlGaAs/GaAs quantum well FETs with a gate length of 0.3 μm. The best multiplication time measured was 7.2 ns.
Appears in Collections:15 Fakultätsübergreifend / Sonstige Einrichtung

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