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Autor(en): Strobel, Manuel
Eggenberger, Marcus
Radetzki, Martin
Titel: Low power memory allocation and mapping for area-constrained systems-on-chips
Erscheinungsdatum: 2016
Dokumentart: Zeitschriftenartikel
Seiten: 12
Erschienen in: EURASIP journal on embedded systems 2017 (2017), Nr. 2
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-ds-88347
http://elib.uni-stuttgart.de/handle/11682/8834
http://dx.doi.org/10.18419/opus-8817
ISSN: 1687-3963
1687-3955
Bemerkungen: Originally published by SpringerOpen
Zusammenfassung: Large fractions of today’s embedded systems’ power consumption can be attributed to the memory subsystem. In order to reduce this fraction, we propose a mathematical model to optimize on-chip memory configurations for minimal power. We exploit the power reduction effect of splitting memory into subunits with frequently accessed addresses mapped to small memories. The definition of an integer linear programming model enables us to solve the twofold problem of allocating an optimal set of memory instances with varying size on the one hand and finding an optimal mapping of application segments to allocated memories on the other hand. Experimental results yield power reductions of up to 82 % for instruction memory and 73 % for data memory. Area usage, at the same time, deteriorates by only 2.1 %, respectively, 1.2 % on average and even improves in some cases. Flexibility and performance of our model make it a valuable tool for low power system-on-chip design, either for efficient design space exploration or as part of a HW/SW codesign synthesis flow.
Enthalten in den Sammlungen:05 Fakultät Informatik, Elektrotechnik und Informationstechnik

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