FPGA implementation of an energy-efficient real-time image compression algorithm for the EIVE satellite mission

Abstract

In this thesis three commonly used image compression algorithms are analyzed in terms of computational complexity, rate-distortion performance and execution time in order to find the most suitable basis for the implementation of an energy-efficient and real time image compression algorithm for the EIVE satellite mission. The selected algorithm is than modified to reduce its complexity while keeping its performance at a comparable level to the base algorithm. Afterwards the algorithm is implemented in the programmable logic part of a Xilinx Zynq UltraScale+ MPSoC device. Finally, the performance of the algorithm implemented on hardware is determined and compared to the performance of an implementation using a high-level scripting language and the performance of its base algorithm.