TESTCHIP: a chip for weighted random pattern generation, evaluation, and test control

dc.contributor.author	Ströle, Albrecht P.	de
dc.contributor.author	Wunderlich, Hans-Joachim	de
dc.contributor.author	Haberl, Oliver F.	de
dc.date.accessioned	2012-04-23	de
dc.date.accessioned	2016-03-31T11:44:38Z
dc.date.available	2012-04-23	de
dc.date.available	2016-03-31T11:44:38Z
dc.date.issued	1990	de
dc.description.abstract	A chip is presented that generates weighted random patterns, applies them to a circuit under test and evaluates the test responses. The generated test patterns correspond to multiple sets of weights. Test response evaluation is done by signature analysis. The chip can easily be connected to a micro computer and thus constitutes the key element of a low-cost test equipment.	en
dc.identifier.other	369845919	de
dc.identifier.uri	http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73151	de
dc.identifier.uri	http://elib.uni-stuttgart.de/handle/11682/7938
dc.identifier.uri	http://dx.doi.org/10.18419/opus-7921
dc.language.iso	en	de
dc.rights	info:eu-repo/semantics/openAccess	de
dc.subject.classification	Selbsttest , Signaturanalyse , Chip	de
dc.subject.ddc	621.3	de
dc.title	TESTCHIP: a chip for weighted random pattern generation, evaluation, and test control	en
dc.type	conferenceObject	de
ubs.fakultaet	Fakultätsübergreifend / Sonstige Einrichtung	de
ubs.institut	Sonstige Einrichtung	de
ubs.opusid	7315	de
ubs.publikation.source	Lardy, Jean Louis (Hrsg.): ESSCIRC '90 : proceedings. Gif-sur-Yvette Cedex : Ed. Frontières, 1990. - ISBN 2-86332-087-4, S. 101-104	de
ubs.publikation.typ	Konferenzbeitrag	de

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