Wang, ZhigongBerroth, ManfredHurm, VolkerLang, ManfredHofmann, PeterHülsmann, AxelKöhler, KlausRaynor, BrianSchneider, Joachim2014-05-122016-03-312014-05-122016-03-31199441195394Xhttp://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92492http://elib.uni-stuttgart.de/handle/11682/8213http://dx.doi.org/10.18419/opus-8196An IC for 20 Gb/s clock recovery and data decision was realised using 0.3 m gate-length QW-HEMTs. A narrow-band regenerative frequency divider with on-chip resonator filters is used for the clock recovery. The parallel processing concept is accepted for the data decision. The complex IC was tested on wafer using 5 and 10-Gb/s input data. The desired 10-GHz clock signal and regenerated data signals have been obtained. The 2x2 mm 2 IC has a power consumption of about 0.5 W at -3 volt supply voltage.eninfo:eu-repo/semantics/openAccessTaktrückgewinnung , Integrierte Schaltung , HEMT621.3conferenceObject