16 x 16 bit parallel multiplier based on 6 K gate array with 0.3 μm AlGaAs/GaAs quantum well transistors

Thiede, AndreasBerroth, ManfredHurm, VolkerNowotny, UlrichSeibel, JörgGotzeina, W.Sedler, MartinRaynor, BrianKöhler, KlausHofmann, PeterHülsmann, AxelKaufel, GudrunSchneider, Joachim2014-04-302016-03-312014-04-302016-03-311992406355452http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92393http://elib.uni-stuttgart.de/handle/11682/8206http://dx.doi.org/10.18419/opus-8189The design and performance of a 16x16 bit parallel multiplier based on a 6 K gate array will be presented. This LSI semicustom IC demonstrates the high potential of the authors' AlGaAs/GaAs quantum well FETs with a gate length of 0.3 μm. The best multiplication time measured was 7.2 ns.eninfo:eu-repo/semantics/openAccessHalbleiterverstärker , Integrierte Schaltung , Multiplexer621.316 x 16 bit parallel multiplier based on 6 K gate array with 0.3 μm AlGaAs/GaAs quantum well transistorsarticle2014-05-19