19 GHz monolithic integrated clock recovery using PLL and 0.3 μm gate-length quantum-well HEMTs

Wang, ZhigongBerroth, ManfredSeibel, JörgHofmann, PeterHülsmann, AxelKöhler, KlausRaynor, BrianSchneider, Joachim2014-05-122016-03-312014-05-122016-03-31199441195461Xhttp://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92515http://elib.uni-stuttgart.de/handle/11682/8214http://dx.doi.org/10.18419/opus-8197ICs for optical data links have been developed for bit rates between 10 and 200 Gb/s. The only exception was the clock recovery (CR) IC at these high bit rates. In fact, the IC realization of CR is generally accepted as the weak point of high-speed system integration. While the bit rates of some ICs reach up to 40 Gb/s, monolithic ICs for a full CR function are limited to 2.5 Gb/s. The monolithic IC described here, for CR with a PLL including a full-balanced VCO, is based on the IC reported by Wang et. al. (1993). Clock frequencies up to 19 GHz are recovered with the IC reported here.eninfo:eu-repo/semantics/openAccessTaktrückgewinnung , Integrierte Schaltung , HEMT621.319 GHz monolithic integrated clock recovery using PLL and 0.3 μm gate-length quantum-well HEMTsconferenceObject