Browsing by Author "Amrouch, Hussam (Prof. Dr.-Ing.)"

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    Brain-inspired hyperdimensional computing for robust and lightweight machine learning
    (2024) Genssler, Paul R.; Amrouch, Hussam (Prof. Dr.-Ing.)
    This thesis investigates hyperdimensional computing (HDC) as an emerging machine learning method. HDC’s integration with in-memory computing architectures is explored to address challenges at both application and technology levels, particularly in the domain of semiconductor test and reliability. HDC’s inherent redundancy offers robustness to errors, making it suitable for applications like transistor aging modeling, circuit recognition, and wafer map defect pattern classification. However, it is computationally demanding for off-the-shelf systems, motivating the development of efficient architectures using FPGA, custom chips, and FeFET-based in-memory computing. This integration bridges the gap between technology and application levels, enhancing efficiency while addressing reliability trade-offs. The work also adapts HDC training to mitigate errors from non-volatile memories, ensuring robust performance. Overall, the thesis demonstrates HDC’s potential for lightweight, efficient ML systems and novel applications, overcoming limitations of traditional approaches.
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    Design for reliability in advanced technologies using machine learning
    (2024) Klemme, Florian; Amrouch, Hussam (Prof. Dr.-Ing.)
    This thesis focuses on the standard cell library, which is one of the core entities in the digital circuit design flow, to demonstrate the challenges and opportunities of advanced technology nodes. The standard cell library serves as a technology interface between the foundry and the circuit designer, enabling automatic mapping of high-level circuit descriptions to the technology of the foundry through the process of logic synthesis. In the past decade, the standard cell library has been continuously adapted to keep up with the demands of shrinking process nodes. This includes, e.g., the integration of more accurate timing models, process variation, or signal integrity for cross-talk and noise in the circuit. This thesis takes this development to the next level and presents approaches to bring machine learning and transistor self-heating into the standard cell library.