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Browsing by Author "Genssler, Paul R."

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    All-in-memory brain-inspired computing using FeFET synapses
    (2022) Thomann, Simon; Nguyen, Hong L. G.; Genssler, Paul R.; Amrouch, Hussam
    The separation of computing units and memory in the computer architecture mandates energy-intensive data transfers creating the von Neumann bottleneck. This bottleneck is exposed at the application level by the steady growth of IoT and data-centric deep learning algorithms demanding extraordinary throughput. On the hardware level, analog Processing-in-Memory (PiM) schemes are used to build platforms that eliminate the compute-memory gap to overcome the von Neumann bottleneck. PiM can be efficiently implemented with ferroelectric transistors (FeFET), an emerging non-volatile memory technology. However, PiM and FeFET are heavily impacted by process variation, especially in sub 14 nm technology nodes, reducing the reliability and thus inducing errors. Brain-inspired Hyperdimensional Computing (HDC) is robust against such errors. Further, it is able to learn from very little data cutting energy-intensive transfers. Hence, HDC, in combination with PiM, tackles the von Neumann bottleneck at both levels. Nevertheless, the analog nature of PiM schemes necessitates the conversion of results to digital, which is often not considered. Yet, the conversion introduces large overheads and diminishes the PiM efficiency. In this paper, we propose an all-in-memory scheme performing computation and conversion at once, utilizing programmable FeFET synapses to build the comparator used for the conversion. Our experimental setup is first calibrated against Intel 14 nm FinFET technology for both transistor electrical characteristics and variability. Then, a physics-based model of ferroelectric is included to realize the Fe-FinFETs. Using this setup, we analyze the circuit’s susceptibility to process variation, derive a comprehensive error probability model, and inject it into the inference algorithm of HDC. The robustness of HDC against noise and errors is able to withstand the high error probabilities with a loss of merely 0.3% inference accuracy.
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    Brain-inspired hyperdimensional computing for robust and lightweight machine learning
    (2024) Genssler, Paul R.; Amrouch, Hussam (Prof. Dr.-Ing.)
    This thesis investigates hyperdimensional computing (HDC) as an emerging machine learning method. HDC’s integration with in-memory computing architectures is explored to address challenges at both application and technology levels, particularly in the domain of semiconductor test and reliability. HDC’s inherent redundancy offers robustness to errors, making it suitable for applications like transistor aging modeling, circuit recognition, and wafer map defect pattern classification. However, it is computationally demanding for off-the-shelf systems, motivating the development of efficient architectures using FPGA, custom chips, and FeFET-based in-memory computing. This integration bridges the gap between technology and application levels, enhancing efficiency while addressing reliability trade-offs. The work also adapts HDC training to mitigate errors from non-volatile memories, ensuring robust performance. Overall, the thesis demonstrates HDC’s potential for lightweight, efficient ML systems and novel applications, overcoming limitations of traditional approaches.
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    Cryogenic embedded system to support quantum computing : from 5-nm FinFET to full processor
    (2023) Genssler, Paul R.; Klemme, Florian; Parihar, Shivendra Singh; Brandhofer, Sebastian; Pahwa, Girish; Polian, Ilia; Chauhan, Yogesh Singh; Amrouch, Hussam
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