Browsing by Author "Gotzeina, W."

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    16 x 16 bit parallel multiplier based on 6 K gate array with 0.3 μm AlGaAs/GaAs quantum well transistors
    (1992) Thiede, Andreas; Berroth, Manfred; Hurm, Volker; Nowotny, Ulrich; Seibel, Jörg; Gotzeina, W.; Sedler, Martin; Raynor, Brian; Köhler, Klaus; Hofmann, Peter; Hülsmann, Axel; Kaufel, Gudrun; Schneider, Joachim
    The design and performance of a 16x16 bit parallel multiplier based on a 6 K gate array will be presented. This LSI semicustom IC demonstrates the high potential of the authors' AlGaAs/GaAs quantum well FETs with a gate length of 0.3 μm. The best multiplication time measured was 7.2 ns.