Digital self-interference cancellation using FPGA for in-band full-duplex radios

Abstract

Conventionally, the transmission and the reception of signals in a particular wireless communication system is performed using the half-duplex method, wherein the transmitter and the receiver signals are either time-multiplexed or frequency-multiplexed. However, in case of an in-band full-duplex system, the bidirectional communication of signals is performed simultaneously in the same frequency band, which improves the spectral efficiency of these systems by a factor of two as compared to the traditional half-duplex systems. Therefore, the in-band full-duplex communication systems can double the data rate provided by the half-duplex communication systems, thereby making the former a matter of interest across the wireless research community. However, the in-band full-duplex systems have theirownset of disadvantages. The major challenge is the self-interference imposed by the high-power transmitter signal on the incoming low-power receiver signal, which further degrades the latter and negatively impacts its estimation. Out of the various methodologies to mitigate the self-interference from the receiver signal, this work focuses on the digital self-interference cancellation techniques. In this thesis, the effects of the self-interference signal on the receiver signal are examined. Furthermore, the different digital self-interference cancellation methods employed for suppressing the self-interference are comparatively analysed. Finally, the field-programmable gate array based implementation of the various digital self-interference cancellation algorithms and their respective performance results are presented as well.