Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7898
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dc.contributor.authorEschermann, Bernhardde
dc.contributor.authorWunderlich, Hans-Joachimde
dc.date.accessioned2012-04-17de
dc.date.accessioned2016-03-31T11:44:34Z-
dc.date.available2012-04-17de
dc.date.available2016-03-31T11:44:34Z-
dc.date.issued1992de
dc.identifier.other369536258de
dc.identifier.urihttp://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73027de
dc.identifier.urihttp://elib.uni-stuttgart.de/handle/11682/7915-
dc.identifier.urihttp://dx.doi.org/10.18419/opus-7898-
dc.description.abstractThe authors describe a synthesis approach that maps a behavioral finite state machine (FSM) description into a testable gate-level structure. The term testable, besides implying the existence of tests, also means that the application of test patterns is facilitated. Depending on the test strategy, the state registers of the FSM are modified, e.g. as scan path or self-test registers. The additional functionality of these state registers is utilized in system mode by interpreting them as smart state registers, capable of producing certain state transitions on their own. To make the best use of such registers, the authors propose a novel state encoding strategy based on an analytic formulation of the coding constraint satisfaction problem as a quadratic assignment problem. An additional minimization potential can be exploited by appropriately choosing the pattern generator for self-testable designs. Experimental results indicate that, compared with conventional design for testability approaches, significant savings are possible this way.en
dc.language.isoende
dc.rightsinfo:eu-repo/semantics/openAccessde
dc.subject.classificationSelbsttest , Automatisches Prüfen , Integrierte Schaltungde
dc.subject.ddc621.3de
dc.titleOptimized synthesis techniques for testable sequential circuitsen
dc.typearticlede
dc.date.updated2012-04-17de
ubs.fakultaetFakultätsübergreifend / Sonstige Einrichtungde
ubs.institutSonstige Einrichtungde
ubs.opusid7302de
ubs.publikation.sourceIEEE transactions on computer-aided design 11 (1992), S. 301-312. URL http://dx.doi.org./10.1109/43.124417de
ubs.publikation.typZeitschriftenartikelde
Appears in Collections:15 Fakultätsübergreifend / Sonstige Einrichtung

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