Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7921
Authors: Ströle, Albrecht P.
Wunderlich, Hans-Joachim
Haberl, Oliver F.
Title: TESTCHIP: a chip for weighted random pattern generation, evaluation, and test control
Issue Date: 1990
metadata.ubs.publikation.typ: Konferenzbeitrag
metadata.ubs.publikation.source: Lardy, Jean Louis (Hrsg.): ESSCIRC '90 : proceedings. Gif-sur-Yvette Cedex : Ed. Frontières, 1990. - ISBN 2-86332-087-4, S. 101-104
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73151
http://elib.uni-stuttgart.de/handle/11682/7938
http://dx.doi.org/10.18419/opus-7921
Abstract: A chip is presented that generates weighted random patterns, applies them to a circuit under test and evaluates the test responses. The generated test patterns correspond to multiple sets of weights. Test response evaluation is done by signature analysis. The chip can easily be connected to a micro computer and thus constitutes the key element of a low-cost test equipment.
Appears in Collections:15 Fakultätsübergreifend / Sonstige Einrichtung

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