Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7934
Authors: Wunderlich, Hans-Joachim
Hellebrand, Sybille
Title: The pseudo-exhaustive test of sequential circuits
Issue Date: 1989
metadata.ubs.publikation.typ: Konferenzbeitrag
metadata.ubs.publikation.source: Meeting the tests of time : International Test Conference 1989. Washington, DC : IEEE Computer Soc. Pr., 1989. - ISBN 0-8186-8962-5, S. 19-27. URL http://dx.doi.org./ 10.1109/TEST.1989.82273
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73342
http://elib.uni-stuttgart.de/handle/11682/7951
http://dx.doi.org/10.18419/opus-7934
Abstract: The concept of a pseudoexhaustive test for sequential circuits is introduced. Instead of test sets one applies pseudoexhaustive test sequences of a limited length, which provides well-known benefits as far as fault coverage, self-test capability, and simplicity of test generation are concerned. Some flip flops and latches are integrated into an incomplete scan path, such that each possible state of the circuit is reachable within a few steps. Some more flip flops and some new segmentation cells are added to the partial scan path in order to make a pseudoexhaustive test feasible. Algorithms for placing these devices automatically are presented. Also it is shown how to transform a pseudoexhaustive test set into a pseudoexhaustive test sequence of a similar size. The analyzed examples show that a conventional complete scan path without additional testability features requires more hardware overhead than the proposed test strategy, which retains all the known benefits of a pseudoexhaustive test.
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