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http://dx.doi.org/10.18419/opus-8197
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DC Element | Wert | Sprache |
---|---|---|
dc.contributor.author | Wang, Zhigong | de |
dc.contributor.author | Berroth, Manfred | de |
dc.contributor.author | Seibel, Jörg | de |
dc.contributor.author | Hofmann, Peter | de |
dc.contributor.author | Hülsmann, Axel | de |
dc.contributor.author | Köhler, Klaus | de |
dc.contributor.author | Raynor, Brian | de |
dc.contributor.author | Schneider, Joachim | de |
dc.date.accessioned | 2014-05-12 | de |
dc.date.accessioned | 2016-03-31T11:45:28Z | - |
dc.date.available | 2014-05-12 | de |
dc.date.available | 2016-03-31T11:45:28Z | - |
dc.date.issued | 1994 | de |
dc.identifier.other | 41195461X | de |
dc.identifier.uri | http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92515 | de |
dc.identifier.uri | http://elib.uni-stuttgart.de/handle/11682/8214 | - |
dc.identifier.uri | http://dx.doi.org/10.18419/opus-8197 | - |
dc.description.abstract | ICs for optical data links have been developed for bit rates between 10 and 200 Gb/s. The only exception was the clock recovery (CR) IC at these high bit rates. In fact, the IC realization of CR is generally accepted as the weak point of high-speed system integration. While the bit rates of some ICs reach up to 40 Gb/s, monolithic ICs for a full CR function are limited to 2.5 Gb/s. The monolithic IC described here, for CR with a PLL including a full-balanced VCO, is based on the IC reported by Wang et. al. (1993). Clock frequencies up to 19 GHz are recovered with the IC reported here. | en |
dc.language.iso | en | de |
dc.rights | info:eu-repo/semantics/openAccess | de |
dc.subject.classification | Taktrückgewinnung , Integrierte Schaltung , HEMT | de |
dc.subject.ddc | 621.3 | de |
dc.title | 19 GHz monolithic integrated clock recovery using PLL and 0.3 μm gate-length quantum-well HEMTs | en |
dc.type | conferenceObject | de |
ubs.fakultaet | Fakultätsübergreifend / Sonstige Einrichtung | de |
ubs.institut | Sonstige Einrichtung | de |
ubs.opusid | 9251 | de |
ubs.publikation.source | Wuorinen, John H. (Hrsg.): Digest of technical papers / 1994 IEEE International Solid-State Circuits Conference. Piscataway, NJ : IEEE Service Center, 1994 (Digest of technical papers / IEEE International Solid State Circuits Conference 37). - ISBN 0-7803-1844-7, S. 118-119 | de |
ubs.publikation.typ | Konferenzbeitrag | de |
Enthalten in den Sammlungen: | 15 Fakultätsübergreifend / Sonstige Einrichtung |
Dateien zu dieser Ressource:
Datei | Beschreibung | Größe | Format | |
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ber14.pdf | 364,96 kB | Adobe PDF | Öffnen/Anzeigen |
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