Compact modeling of modern power MOSFETs based on industry-standard CMOS models

Abstract

This work presents a modeling approach adopting the industry-standard models for circuit simulation with necessary extensions to describe vertical power MOSFETs. Standard models, which are developed for CMOS logic devices, are adopted with their proven robustness and fidelity to describe the voltage-controlled channel behavior of power MOSFETs. Considering the vertical MOSFET structure, the extended components including the nonlinear drift region, body-diode and the parasitic capacitance are defined as model extensions. The specific requirements for SiC MOSFETs different from the Si devices are also analyzed. The static and dynamic characteristics considering the thermal effects are measured as the reference for the model parameter extraction. Some attempts to create high voltage MOSFET models by adding elements to a standard MOSFET model are already reported, but these models are still not developed aiming at high current level power MOSFETs, or some crucial effects like the asymmetric reverse conducting current, reverse recovery of the body-diode etc. are not defined. This work provides a particular approach to characterize commercially available vertical power MOSFETs and proposes the modeling method describing the critical effects of power MOSFETs which enable the model to precisely describe the performance of the devices in switching mode simulations. Moreover, the model extension approach discussed in this work is not limited to a certain standard model. The physics based standard models can be categorized into three groups: threshold voltage based, inversion charge based, and surface potential based. The properties of three standard models from each group are analyzed and compared. The appropriate extension strategy is developed for each standard model and the specific parameter extraction flow is also provided for each proposed model. Compared with the vendor model, the modeling method proposed in this work can increase the accuracy of the simulation of the transient switching loss by around 20%, which can contribute to improve the power MOSFET compact modeling of the semiconductor community in view of improving the design of switched-mode power converters.