15 Fakultätsübergreifend / Sonstige Einrichtung
Permanent URI for this collectionhttps://elib.uni-stuttgart.de/handle/11682/16
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Item Open Access Prüfgerechter Entwurf und Test hochintegrierter Schaltungen(1992) Wunderlich, Hans-Joachim; Schulz, Michael H.Der Beitrag gibt einen Überblick über die wichtigsten praxisrelevanten Teststrategien, wobei unter einer Teststrategie nicht nur die Verfahren zur Testsatzerzeugung und zur eigentlichen Testdurchführung, sondern auch das zugrunde liegende Fehlermodell und die erforderlichen testfreundlichen Entwurfsmaßnahmen, die die Voraussetzung für die Anwendung dieser Verfahren darstellen, zu verstehen sind. Es werden die gängigsten Methoden zum konventionellen externen Test vorgestellt und bewertet sowie das Prinzip der immer breitere Anwendung findenden Selbsttestmethoden und ihre Vorteile erläutert. Nach einem kurzen Ausblick auf die Fortschritte, die Verfahren zur automatischen Synthese testbarer Schaltungen erhoffen lassen, werden schließlich Aspekte des Systemtests und insbesondere das Boundary-Scan-Prinzip und die damit verbundenen Vorteile diskutiert.Item Open Access The pseudoexhaustive test of sequential circuits(1992) Wunderlich, Hans-Joachim; Hellebrand, SybilleThe concept of a pseudoexhaustive test for sequential circuits is introduced in a way similar to that which is used for combinational networks. Using partial scan all cycles in the data flow of a sequential circuit are removed, such that a compact combinational model can be constructed. Pseudoexhaustive test sequences for the original circuit are constructed from a pseudoexhaustive test set for this model. To make this concept feasible for arbitrary circuits a technique for circuit segmentation is presented which provides special segmentation cells as well as the corresponding algorithms for the automatic placement of the cells. Example circuits show that the test strategy requires less additional silicon area than a complete scan path. Thus the advantages of a partial scan path are combined with the well-known benefits of a pseudoexhaustive test, such as high fault coverage and simplified test generation.Item Open Access Methoden der Testvorbereitung zum IC-Entwurf(1990) Schulz, Michael H.; Wunderlich, Hans-JoachimNeben dem eigentlichen Testen umfaßt eine Teststrategie die Auswahl eines geeigneten Fehlermodells, ein Verfahren für den prüfgerechten strukturierten Entwurf sowie die Testsatzerzeugung. Ziel dieser Prüfvorbereitung ist die Steigerung der Produktqualität sowie die Senkung der Testkosten bei integrierten Schaltungen.Item Open Access Multiple distributions for biased random test patterns(1990) Wunderlich, Hans-JoachimThe test of integrated circuits by random patterns is very attractive, since no expensive test pattern generation is necessary and tests can be applied with a self-test technique or externally using linear feedback shift registers. Unfortunately, not all circuits are random-testable, because either the fault coverage is too low or the required test length too large. In many cases the random test lengths can be reduced by orders of magnitude using weighted random patterns. However, there are also some circuits for which no single optimal set of weights exists. A set of weights defines a distribution of the random patterns. It is shown that the problem can be solved using several distributions instead of a single one, and an efficient procedure for computing the optimized input probabilities is presented. If a sufficient number of distributions is applied, then all combinational circuits can be tested randomly with moderate test lengths. The patterns can be produced by an external chip, and an optimized test schedule for circuits with a scan path can be obtained. Formulas are derived to determine strong bounds on the probability of detecting all faults.Item Open Access TESTCHIP: a chip for weighted random pattern generation, evaluation, and test control(1991) Ströle, Albrecht P.; Wunderlich, Hans-JoachimIn self-testable circuits, additional hardware is incorporated for generating test patterns and evaluating test responses. A built-off test strategy is presented which moves the additional hardware to a programmable extra chip. This is a low-cost test strategy in three ways: (1) the use of random patterns eliminates the expensive test-pattern computation; (2) a microcomputer and an ASIC (application-specific IC) replace the expensive automatic test equipment; and (3) the design for testability overhead is minimized. The presented ASIC generates random patterns, applies them to a circuit under test, and evaluates the test responses by signature analysis. It contains a hardware structure that can produce weighted random patterns corresponding to multiple programmable distributions. These patterns give a high fault coverage and allow short test lengths. A wide range of circuits can be tested as the only requirement is a scan path and no other test structures have to be built in.Item Open Access Time-optimal control policies for cascaded production-inventory systems with control and state constraints(1984) Warschat, Joachim; Wunderlich, Hans-JoachimIn this paper time-optimal control policies are derived for models of production-inventory systems consisting of a cascade of basic production- inventory systems with control and state constraints. The analytic solution is due to a decoupling of the complete system into its subsystems by a recursive definition of the cascaded system. It is shown that there is at least one bang-bang controlled subsystem. For the "other" subsystems singular control policies are obtained. Introducing a pseudo-bang-bang control for these systems it is demonstrated that by strengthening the constraints there is a continuous transition from a singular to a bang-bang control.Item Open Access Optimized synthesis techniques for testable sequential circuits(1992) Eschermann, Bernhard; Wunderlich, Hans-JoachimThe authors describe a synthesis approach that maps a behavioral finite state machine (FSM) description into a testable gate-level structure. The term testable, besides implying the existence of tests, also means that the application of test patterns is facilitated. Depending on the test strategy, the state registers of the FSM are modified, e.g. as scan path or self-test registers. The additional functionality of these state registers is utilized in system mode by interpreting them as smart state registers, capable of producing certain state transitions on their own. To make the best use of such registers, the authors propose a novel state encoding strategy based on an analytic formulation of the coding constraint satisfaction problem as a quadratic assignment problem. An additional minimization potential can be exploited by appropriately choosing the pattern generator for self-testable designs. Experimental results indicate that, compared with conventional design for testability approaches, significant savings are possible this way.Item Open Access An analytical approach to the partial scan problem(1990) Kunzmann, Arno; Wunderlich, Hans-JoachimThe scan design is the most widely used technique used to ensure the testability of sequential circuits. In this article it is shown that testability is still guaranteed, even if only a small part of the flipflops is integrated into a scan path. An algorithm is presented for selecting a minimal number of flipflops, which must be directly accessible. The direct accessibility ensures that, for each fault, the necessary test sequence is bounded linearly in the circuit size. Since the underlying problem is NP-complete, efficient heuristics are implemented to compute suboptimal solutions. Moreover, a new algorithm is presented to map a sequential circuit into a minimal combinational one, such that test pattern generation for both circuit representations is equivalent and the fast combinational ATPG methods can be applied. For all benchmark circuits investigated, this approach results in a significant reduction of the hardware overhead, and additionally a complete fault coverage is still obtained. Amazingly the overall test application time decreases in comparison with a complete scan path, since the width of the shifted patterns is shorter, and the number of patterns increase only to a small extent.Item Open Access Output-maximal control policies for cascaded production-inventory systems with control and state constraints(1988) Warschat, Joachim; Wunderlich, Hans-JoachimOptimal control policies are derived for cascaded production-inventory systems. As objectives, output maximization and the minimum time to produce a fixed output are considered. An example consisting of three subsystems is detailed to illustrate the proposed theory.