07 Fakultät Konstruktions-, Produktions- und Fahrzeugtechnik
Permanent URI for this collectionhttps://elib.uni-stuttgart.de/handle/11682/8
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Item Open Access A 10 V transfer standard based on low-noise solid-state Zener voltage reference ADR1000(2024) Bülau, André; Walter, Daniela; Zimmermann, AndréVoltage standards are widely used to transfer volts from Josephson voltage standards (JVSs) at national metrology institutes (NMIs) into calibration labs to maintain the volts and to transfer them to test equipment at production lines. Therefore, commercial voltage standards based on Zener diodes are used. Analog Devices Inc. (San Jose, CA, USA), namely, Eric Modica, introduced the ADR1000KHZ, a successor to the legendary LTZ1000, at the Metrology Meeting 2021. The first production samples were already available prior to this event. In this article, this new temperature-stabilized Zener diode is compared to several others as per datasheet specifications. Motivated by the superior parameters, a 10 V transfer standard prototype for laboratory use with commercial off-the-shelf components such as resistor networks and chopper amplifiers was built. How much effort it takes to reach the given parameters was investigated. This paper describes how the reference was set up to operate it at its zero-temperature coefficient (z.t.c.) temperature and to lower the requirements for the oven stability. Furthermore, it is shown how the overall temperature coefficient (t.c.) of the circuit was reduced. For the buffered Zener voltage, a t.c. of almost zero, and with amplification to 10 V, a t.c. of <0.01 µV/V/K was achieved in a temperature span of 15 to 31 °C. For the buffered Zener voltage, a noise of ~584 nVp-p and for the 10 V output, ~805 nVp-p were obtained. Finally, 850 days of drift data were taken by comparing the transfer standard prototype to two Fluke 7000 voltage standards according to the method described in NBS Technical Note 430. The drift specification was, however, not met.Item Open Access FIB-SEM tomography for porosity characterization of inkjet printed nanoparticle gold ink(2024) Ruehl, Holger; Reguigui, Hajer; Guenther, Thomas; Zimmermann, AndréInkjet printing is a versatile technology for the manufacturing of electronic devices to be used in various applications [1,2]. Common inks to create conductive layers are suspensions of a solvent with metal nanoparticles such as gold or silver [3]. After the deposition and solidification of an ink on a substrate, the metal nanoparticles are sintered to realize the conductivity of the printed layer. A porous, solid metal matrix remains, whereby the conductivity of the metal layer tends to be dependent on the porosity. To characterize the porosity of inkjet printed conductive layers, focused ion beam-scanning electron microscope (FIB-SEM) tomography is suggested as a potential characterization method in the presented study. For the experiment, a wafer diced silicon substrate with size of 10 x 10 mm² was used, onto which a 1.2 µm thin layer of commercially available nanoparticle gold ink was inkjet printed and then sintered. Subsequently, a four-step procedure for the FIB-SEM tomography-based porosity characterization was performed: 1) FIB preparation of the volume of interest (VOI), 2) serial sectioning including image acquisition, 3) image processing and 4) 3D-reconstruction and porosity analysis. The steps 1) and 2) were conducted using a FIB-SEM dual beam system ZEISS AURIGA 40 (Carl Zeiss Microscopy Deutschland GmbH, Germany). Prior to serial sectioning, a thin platinum layer was FIB induced deposited on top of the inkjet printed gold layer. A cube-shaped VOI with the size 5000 x 6000 x 5000 nm³ was then prepared by FIB milling. The surface to be sectioned was end face polished and a line trench serving as a reference marker for the image processing was milled along the VOI. The prepared VOI prior to FIB sectioning is shown in Figure 1. a). Next, the serial sectioning was conducted. The ion acceleration voltage was set to 30 kV. The aperture current was set to 50 pA, resulting in an ion beam spot size of 12.5 nm, which corresponds to the section slice thickness. No melting and re-sintering of the solid metal structure could be observed during sectioning. SEM images of the revealing surface areas were acquired with 1024 x 768 pixels image resolution and a pixel size of 5.82 nm. Both a secondary electron (SE) detector as well as a backscattered electron (BSE) detector were used for imaging. In total, a 2D stack of 368 SEM images was recorded. For comparison of individual sections, Figure 1. b) and c) show BSE detector images of the cross-sectioned VOI after slice 70 and slice 140. One can clearly see that the size and distribution of sintered metal particles varies along the VOI, forming a porosity network within the solid gold. Since the images acquired with the BSE detector presented a higher contrast and thus, a better distinction between the pores and the metal structure, these images were used for the image processing and final porosity analysis, for which the software AVIZO (Thermo Fisher Scientific Inc., USA) was used. First, the 2D images were aligned to correct for the shifts which occurred during the serial sectioning. Then, a sub-VOI was cropped out to exclude the reference line. The new 3D VOI was of a size of 3026 x 1164 x 2750 nm³, representing a stack of BSE detector images ranging from slice 30 to 250. Noise interference was minimized by applying a Gaussian filter. Afterwards, thresholding was applied as a segmentation technique to differentiate between pores and the solid gold as well as erosion as morphological operation. As a result, a reconstructed 3D model of the pores located in the solid gold was obtained, as shown in Figure 2. a). Using this 3D pore model, the number of pores and their diameters within the VOI could be determined. For the calculation of the pore diameters, each pore was considered to be of a spherical shape. A total of 1509 pores was counted. The pore diameter distribution is shown in the box plot in Figure 2. b). As it can be obtained from Figure 2. b), a pore size of 23 nm represents the lower quartile, while a pore size of 112 nm represents the upper quartile. The median pore size is 44 nm, while the mean is 63 nm, which indicates a trend towards smaller pores surrounded by larger pores. Based on the obtained results, FIB-SEM tomography with subsequent image processing is assessed by the authors to be a proper method to characterize the porosity of inkjet printed conductive layers, which was tested by means of a nanoparticle gold ink.Item Open Access Dielectric properties of PEEK/PEI blends as substrate material in high-frequency circuit board applications(2024) Scherzer, Tim; Wolf, Marius; Werum, Kai; Ruckdäschel, Holger; Eberhardt, Wolfgang; Zimmermann, AndréSubstrate materials for printed circuit boards must meet ever-increasing requirements to keep up with electronics technology development. Especially in the field of high-frequency applications such as radar and cellular broadcasting, low permittivity and the dielectric loss factor are key material parameters. In this work, the dielectric properties of a high-temperature, thermoplastic PEEK/PEI blend system are investigated at frequencies of 5 and 10 GHz under dried and ambient conditions. This material blend, modified with a suitable filler system, is capable of being used in the laser direct structuring (LDS) process. It is revealed that the degree of crystallinity of neat PEEK has a notable influence on the dielectric properties, as well as the PEEK phase structure in the blend system developed through annealing. This phenomenon can in turn be exploited to minimize permittivity values at 30 to 40 wt.-% PEI in the blend, even taking into account the water uptake present in thermoplastics. The dielectric loss follows a linear mixing rule over the blend range, which proved to be true also for PEEK/PEI LDS compounds.Item Open Access Inkjet-printed low temperature co-fired ceramics: process development for customized LTCC(2024) Jäger, Jonas; Ihle, Martin; Gläser, Kerstin; Zimmermann, AndréThis paper investigates the utilization of digital printing technologies for the fabrication of low temperature co-fired ceramics (LTCC). LTCC offer great opportunities for applications such as antennas, sensors or actuators due to their outstanding properties like low dielectric loss, low permittivity, low coefficient of thermal expansion and at the same time high reliability in harsh environments (heat, humidity, and radiation). LTCC are multilayer circuits that are typically functionalized by screen-printing. This publication investigates the replacement of screen-printing by digital printing processes, such as inkjet and Aerosol Jet printing, to facilitate a more resource-friendly and customizable manufacturing of LTCC. The use of digital printing technologies not only streamlines small-scale productions and development processes but also offers the advantage of achieving miniaturization down to single-digit microns. In this publication, digital printing processes, filling of vias, lamination processes, co-firing at 850 °C and printing on fired LTCC were investigated. Three layers of nanoparticle silver ink were printed on green LTCC tape and 100% of the embedded printed structures were conductive after co-firing. Filling of vias with inkjet printing was investigated and the most important process parameters were found to be the clustering of vias, the amount of active nozzles and the substrate temperature. Printing on fired LTCC demonstrated high precision, and sintering at 600 °C achieved strong adhesion of printed structures to LTCC. These successful findings culminate in presenting a process chain for fully maskless structured, multilayer LTCC.Item Open Access Experimental study on surface roughness and residual stress development in loose-abrasive polishing of hardened tool steel(2025) Ruehl, Holger; Li, Yuxuan; Guenther, Thomas; Breidenstein, Bernd; Zimmermann, AndréThe repeatability and control of the achievable surface integrity in manual loose-abrasive diamond polishing of workpieces is very limited. In this study, first effects of polishing on the surface roughness and on induced near-surface residual stress of hardened tool steel X37CrMoV5-1 using an automatic metallographic grinder polisher have been investigated. The results show different effects of polishing parameters such as grain size, platen speed and forces applied to the workpiece on roughness and residual stress. XRD measurements of the residual stress depth profile showed a reduction in compressive stress which could be explained by the material removal mechanism and direction.