Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7923
Authors: Hellebrand, Sybille
Wunderlich, Hans-Joachim
Haberl, Oliver F.
Title: Generating pseudo-exhaustive vectors for external testing
Issue Date: 1990
metadata.ubs.publikation.typ: Konferenzbeitrag
metadata.ubs.publikation.source: Denburg, Donald (Hrsg.): The changing philosophy of test : proceedings. Piscataway, NJ : IEEE Computer Soc. Pr., 1990. - ISBN 0-8186-2064-1, S. 670-679. URL http://dx.doi.org./ 10.1109/TEST.1990.114082
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73170
http://elib.uni-stuttgart.de/handle/11682/7940
http://dx.doi.org/10.18419/opus-7923
Abstract: Over the past years special chips for external tests have been successfully used for random pattern testing. The authors present a technique for combining the advantages of such a low-cost test with the advantages of pseudoexhaustive testing, which are enhanced fault coverage and simplified test pattern generation. To achieve this goal, two tasks are accomplished. First, an algorithm is developed for pseudoexhaustive test pattern generation, which ensures a feasible test length. Second, a chip design for applying these test patterns to a device under test is presented. The chip is programmed by the output of the proposed algorithm and controls the entire test. The technique is first applied to devices with a scan path and then extended to sequential circuits. A large number of benchmark circuits have been investigated, and the results are presented.
Appears in Collections:15 Fakultätsübergreifend / Sonstige Einrichtung

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