Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7944
Authors: Wunderlich, Hans-Joachim
Title: The random pattern testability of programmable logic arrays
Issue Date: 1987
metadata.ubs.publikation.typ: Konferenzbeitrag
metadata.ubs.publikation.source: Proceedings / 1987 IEEE International Conference on Computer Design. Washington, DC : Computer Soc. of the IEEE, 1987. - ISBN 0-8186-0802-1, S. 682-685
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-73504
http://elib.uni-stuttgart.de/handle/11682/7961
http://dx.doi.org/10.18419/opus-7944
Abstract: An efficient Monte Carlo Algorithm is presented estimating the detection probability of each stuck at fault of a PLA. Furthermore for each primary input of the PLA the optimal probability is computed to set this input to logical "1". Using those unequiprobable input probabilities the necessary test set can be reduced by orders of magnitude. Thus a seIftest by optimized random patterns is possible even if the circuit contains large PLAs preventing a conventional random test.
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