Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-7949
|Title:||Design automation of random testable circuits|
|metadata.ubs.publikation.source:||Winner, Lewis (Hrsg.): Digest of technical papers / 1985 IEEE International Solid-State Circuits Conference. Coral Gables, Fla. : Winner, 1985, S. 277-285|
|Abstract:||This paper describes the integration of a new tool for testability measurement and improvement into a design system for integrated circuits. The involved design system, CADDY (Carlsruhe Digital Design System), uses a functional description of a circuit written in a PASCAL like language and synthesizes a list of nets and real logical components. In this resulting structure all storing elements are configured as a scan path automatically. Therefore testability analysis and test generation may be restricted to pure combinational networks. This is done by the software tool PROTEST (Probabilistic Testability Analysis). PROTEST determines the testability of a combinational circuit by random patterns, it computes the test length necessary to reach a given fault coverage with an also given confidence, and it proposes modifications of the random pattern sets, which leads to decreasing test lengths.|
|Appears in Collections:||15 Fakultätsübergreifend / Sonstige Einrichtung|
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