Please use this identifier to cite or link to this item: http://dx.doi.org/10.18419/opus-8201
Authors: Berroth, Manfred
Hurm, Volker
Nowotny, Ulrich
Hülsmann, Axel
Kaufel, Gudrun
Köhler, Klaus
Raynor, Brian
Schneider, Joachim
Title: A 2.5 ns 8 x 8-b parallel multiplier using 0.5 μm GaAs/GaAlAs heterostructure field effect transistors
Issue Date: 1991
metadata.ubs.publikation.typ: Zeitschriftenartikel
metadata.ubs.publikation.source: Microelectronic engineering 15 (1991), S. 327-330. URL http://dx.doi.org/10.1016/0167-9317(91)90238-9
URI: http://nbn-resolving.de/urn:nbn:de:bsz:93-opus-92555
http://elib.uni-stuttgart.de/handle/11682/8218
http://dx.doi.org/10.18419/opus-8201
Abstract: To increase performance of GaAs LSI digital circuits, a 0.5 μm recessed gate process has been developed and utilized for an 8x8-b parallel multiplier. The chip contains about 3000 heterostructure field effect transistors and has a power consumption of 1.5 W. The best results of the maximum multiplication time measured were below 2.5 nsec.
Appears in Collections:15 Fakultätsübergreifend / Sonstige Einrichtung

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