15 Fakultätsübergreifend / Sonstige Einrichtung
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Item Open Access The synthesis of self-test control logic(1989) Haberl, Oliver F.; Wunderlich, Hans-JoachimIn recent years, many built-in self-test techniques have been proposed based on feedback shift-registers for pattern generation and signature analysis. But in general, these test-registers cannot test several modules of the chip concurrently, and they have to be controlled by external automatic test equipment. The authors propose a method to integrate additional test-control logic into the chip. On the basis of a register-transfer description of the circuit, the test control is derived, and a corresponding finite automation is synthesized. A hardware implementation is proposed, resulting in circuits where the entire self-test only consists in activating the test mode and clocking and evaluating the overall signature.Item Open Access 10 Gbit/s monolithic integrated Msm-photodiode AlGaAs/GaAs-HEMT optoelectronic receiver(1991) Hurm, Volker; Rosenzweig, Josef; Ludwig, Manfred; Benz, Willi; Osorio, Ricardo; Berroth, Manfred; Hülsmann, Axel; Kaufel, Gudrun; Köhler, Klaus; Raynor, Brian; Schneider, Joachim-Item Open Access Erfassung und Modellierung komplexer Funktionsfehler in Mikroelektronik-Bauelementen(1992) Stern, Olaf; Wunderlich, Hans-JoachimEs wird ein Verfahren vorgestellt, das für die Grundzellen einer Zellbibliothek layoutabhängig die möglichen Fehlfunktionen bestimmt, die durch Fertigungsfehler verursacht werden können. Eingabe für das Verfahren sind neben dem Layout einer Zelle die Prozeßparameter und die Defektverteilungen, Ausgabe sind die realistischen Fehlfunktionen mit ihren Auftrittswahrscheinlichkeiten. Damit können Testerzeugung und Testablauf beschleunigt, schwer testbare Fehler bestimmt und ihre Ursachen lokalisiert und beseitigt werden.Item Open Access 1.3 μm monolithic integrated optoelectronic receiver using InGaAs MSM photodiode and AlGaAs/GaAs HEMTs grown on GaAs(1994) Hurm, Volker; Benz, Willi; Berroth, Manfred; Fink, Thomas; Fritzsche, Daniel; Haupt, Michael; Hofmann, Peter; Köhler, Klaus; Ludwig, Manfred; Mause, Klaus; Raynor, Brian; Rosenzweig, JosefThe first 1.3 μm monolithic integrated optoelectronic receiver using an InGaAs MSM photodiode and AlGaAs/GaAs HEMTs grown on a GaAs substrate has been fabricated. At each differential output the transimpedance is 26.8 kΩ. The bandwidth of 430 MHz implies suitability for transmission rates up to 622 Mbit/s.Item Open Access Parallel self-test and the synthesis of control units(1991) Eschermann, Bernhard; Wunderlich, Hans-JoachimMost self-test techniques are implemented with so-called multifunctional test registers at any specific time either used for pattern generation or for response analysis. In a parallel self-test, however, test registers are used for pattern generation and response analysis simultaneously. In this paper a novel circuit structure for controllers with parallel self-test is presented, which does not result in a loss of fault coverage. By using a dedicated synthesis procedure, which considers the self-test hardware while generating the circuit structure instead of adding it after the design is completed ("synthesis for testability"), the self-test overhead can be kept low. The structure also facilitates realistic dynamic tests. As an example to illustrate the approach, the IEEE boundary scan controller is used.Item Open Access Indirect optically controlled pseudomorphic HEMT based MMIC oscillator(1992) Bangert, Axel; Benz, Willi; Berroth, Manfred; Hülsmann, Axel; Hurm, Volker; Kaufel, Gudrun; Köhler, Klaus; Rosenzweig, Josef; Schneider, JoachimFor the first time an indirect optically controlled monolithic integrated oscillator was fabricated and examined experimentally. The oscillator was designed for a frequency of about 7 GHz. By illuminating a 60x60 μm2 photodiode by the light of a pigtailed laser diode (λ=840 nm), the free-running frequency of the oscillator was tunable in a range of more than 7 MHz. A locking range of more than 3 MHz was achieved. A phase shift in the output signal of nearly 180° has been observed.Item Open Access Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits(1988) Wunderlich, Hans-Joachim; Hellebrand, SybilleA method based on linear feedback shift registers over finite fields is presented to generate for a natural number n a pattern sequence with minimal length detecting each m-multiple stuck-open faults for M≤n. A hardware architecture is discussed generating this sequence, and for n=1 a built-in self-test (BIST) approach is presented that detects all combinations of multiple combinational and single stuck-open faults. The sequences are of minimum length, and can be produced either by software, by an external chip, or be a BIST-structure. Using the latter, the hardware overhead would be of the same magnitude as a conventional pseudorandom architecture.Item Open Access Integrated tools for automatic design for testability(1988) Schmid, Detlef; Wunderlich, Hans-Joachim; Feldbusch, Fridtjof; Hellebrand, Sybille; Holzinger, Jürgen; Kunzmann, ArnoAn increasing part of the overall costs of custom and semicustom integrated circuits has to be spent for test purposes, and therefore the integration of test and design seems to be a key of cost reduction. At the University of Karlsruhe a program system is currently developed supporting the design of testable circuits. The program system under work essentially solves three tasks: 1.) Selection of an economical test strategy. 2.) Implementation of necessary circuit modifications in order to enhance testability, retaining the circuit function by construction. 3.) Generation of the test program.Item Open Access An efficient procedure for the synthesis of fast self-testable controller structures(1994) Hellebrand, Sybille; Wunderlich, Hans-JoachimThe BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for rest purposes. This leads to some serious drawbacks concerning the fault coverage, the system speed and the area overhead. A synthesis technique is presented which uses the additional test register also to implement the system function by supporting self-testable pipeline-like controller structures. It will be shown, that if the need of two different registers in the final structure is already taken into account during synthesis, then the overall number of flipflops can be reduced, and the fault coverage and system speed call be enhanced. The presented algorithm constructs realizations of a given finite state machine a self-testable structure. The efficiency of the procedure is ensured by a very precise characterization of the space of suitable realizations, which avoids the computational overhead of previously published algorithms.Item Open Access A synthesis approach to reduce scan design overhead(1990) Eschermann, Bernhard; Wunderlich, Hans-Joachim-